The present invention relates to an electronic system having a first module, from which data is sent via a connecting line to a further module. The present invention also relates to a method for time control of the data transmission from a first module to a further module.
Electronic systems having a number of electronic modules, such as integrated circuits, frequently have to be able to process data at a relatively high speed. This applies, in particular, to systems which are used in optical message networks where high data transmission rates are used.
In order to achieve a high data processing speed, a signal which is received by the system can be split into a number of subsignals, which are processed in parallel, in appropriate modules.
If the subsignals are then transmitted from one module via a number of connecting lines in a parallel manner to a further module, the subsignals can arrive at the further module at respectively different times. This is due, for example, to different delay times on the various connecting lines.
This is particularly true when the delay times on the connecting lines are in the same order of magnitude as the clock period duration of the transmitted data bits.
For example, if there is a length difference of 10 cm between two different connecting lines and the clock frequency that is used is, for example, 2.5 GHz, this leads to a delay time difference of approximately 700 ps, which corresponds virtually to two clock periods.
An object of the present invention is, therefore, to provide a novel method for time control of the data transmission from a first module to a further module, as well as a novel electronic system having a first module from which data is transmitted via a connecting line to a further module, and in which the delay time differences that occur during the data transmission are reduced.